NEO Semiconductor Launches NEO.AI Memory Platform

NEO Semiconductor unveiled NEO.AI, a platform combining X-SRAM and 3D X-DRAM to solve on-chip memory and HBM capacity bottlenecks.

On August 5, 2026, NEO Semiconductor announced the NEO.AI memory platform. CEO Andy Hsu and Advisory Board Member Stan Shih, former Acer CEO and TSMC director, introduced the system which integrates X-SRAM and 3D X-DRAM into a unified architecture.

The platform features X-SRAM, which offers five times the density of conventional SRAM and supports nanosheet CMOS processes. It also includes 3D X-DRAM, which uses 3D NAND manufacturing to provide ten times the capacity of standard DRAM technologies.

NEO.AI addresses critical bottlenecks in AI hardware. With proof-of-concept validation for 3D X-DRAM complete, the technology aims to scale high-capacity HBM and on-chip memory. This advancement supports the growing demands of next-generation AI processing.


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