x86 Group Unveils ACE AI Command Set for CPUs

The x86 Ecosystem Advisory Group has introduced AI Compute Extensions (ACE) to accelerate matrix operations in future x86 processors.

The x86 Ecosystem Advisory Group has released version 1.15 of the AI Compute Extensions (ACE) specification, introducing dedicated matrix multiplication accelerators for future x86 processors. ACE utilizes a tile-based computing model integrated with existing AVX and AMX mechanisms, loading data into tile registers for matrix and outer-product operations. The instruction set supports reduced numerical formats including FP8, FP6, FP4, BF16, and INT8, as well as OCP microscaling formats MX FP8 and MX INT8. Key features include block-scale registers for numerical scaling and support for stochastic rounding. While ARM utilizes Scalable Matrix Extensions (SME2), ACE focuses on efficient x86 matrix processing. ACE-compatible hardware is expected by 2028, with AMD signaling new matrix engines for its Zen 7 architecture.